How to create mux using logic gates?

Could you please explain in detail the process of creating a multiplexer, or mux, using logic gates? I'm particularly interested in understanding the role of each gate in the construction and how they work together to select and output the desired signal. Additionally, could you provide an example of a simple mux implementation using AND, OR, and NOT gates? How does the selection input influence the output, and what happens if multiple selection lines are activated simultaneously?